1. Field of the Invention
The embodiments discussed herein relate to a semiconductor device and method of manufacturing a semiconductor device used as a switching device formed on a silicon carbide substrate.
2. Description of the Related Art
FIG. 13 is a cross-sectional view of a conventional metal-oxide-semiconductor field-effect transistor (MOSFET). An N-type SiC layer 2 is formed on a front surface side of an N-type silicon carbide (hereinafter, SiC) substrate 1, and plural P-type regions 3 are formed in a surface layer of the N-type SiC layer 2. An N-type source region 4 and a P-type contact region 5 are formed in the surface of the P-type regions 3. Further, a first gate electrode 7 and an interlayer insulating film 8 covering the first gate electrode 7 are formed via a gate insulating film 6, on a surface of the N-type SiC layer 2 and P-type region 3 between N-type source regions 4.
A first source electrode 9 is formed on a surface of the N-type source region 4 and the P-type contact region 5, and a second source electrode 11 is formed on a surface of the first source electrode 9. A drain electrode 12 is formed on a back surface side of the SiC substrate 1. A gate pad or gate runner is formed by a second gate electrode 22 and a second gate metal electrode 23 on an oxide film 21 of the front surface side of the SiC substrate 1. The second gate electrode 22 and the first gate electrode 7 are connected and when voltage is applied to the second gate metal electrode 23, the same voltage is applied to the first gate electrode 7.
In the MOSFET of the described structure, when a positive voltage with respect to the second source electrode 11 is applied to the drain electrode 12 and voltage less than the gate threshold is applied to the first gate electrode 7, PN junctions between the P-type regions 3 and the N-type SiC layer 2 are inversely biased and therefore, current does not flow. On the other hand, when voltage equal to or higher than the gate threshold is applied to the first gate electrode 7, on a surface of the P-type regions 3 directly under the first gate electrode 7, an inversion layer is formed and current flows. Thus, switching operation of the MOSFET may be performed by the voltage applied to the first gate electrode 7 (for example, refer to Japanese Patent Application Laid-Open Publication No. 2013-058603).